Luca Fehlings

Hello! I am Luca Fehlings, a PostDoc at the Chair of Nanoelectronic Circuits and Systems at the Technical University of Munich. Currently, I research ferroelectric HfO2-based devices and their integration into conventional memory macros as well as neuromorphic CMOS circuits. Together with my colleagues I am realizing circuit building blocks that allow efficient memory storage as well as learning on biological time-scales in hardware.

My research interests cover the topics of process integration, compact modeling and electrical characterization of semiconductor and memory devices, particularly regarding their integrability and reliability.

I hold a PhD degree from the University of Groningen, which I received in 2026, as well as a B.Sc and M.Sc degree from RWTH Aachen in Electrical Engineering, which I received in 2019 and 2022. During that time I worked on photonics, 2D-materials and organic semiconductors.

selected publications

Heracles: A HfO2 Ferroelectric Capacitor Compact Model for Efficient Circuit Simulations

Luca Fehlings, Md Hanif Ali, Paolo Gibertini, and 4 more authors

IEEE Transactions on Electron Devices, 2025

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This paper presents a physics-based compact model for circuit simulations in a SPICE environment for HfO2-based ferroelectric capacitors (FeCaps). The model has been calibrated based on experimental data obtained from HfO2-based FeCaps. A thermal model with an accurate description of the device parasitics is included to derive precise device characteristics based on first principles. The model incorporates statistical data that enables Monte Carlo analysis based on realistic distributions, thereby making it particularly well-suited for design-technology co-optimization (DTCO). Furthermore, the model is demonstrated in circuit simulations using an integrated circuit with current programming, wherein partial switching of the ferroelectric polarization is observed. Finally, the model was benchmarked in an array simulation, reaching convergence in 1.8 s with an array size of 100 kb.
Reliability of Capacitive Read in Arrays of Ferroelectric Capacitors

Luca Fehlings, Muhtasim Alam Chowdhury, Banafsheh Saber Latibari, and 2 more authors

In 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025

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The non-destructive capacitance read-out of ferroelectric capacitors (FeCaps) based on doped HfO2 metal-ferroelectric-metal (MFM) structures offers the potential for low-power and highly scalable crossbar arrays. This is due to a number of factors, including the selector-less design, the absence of sneak paths, the power-efficient charge-based read operation, and the reduced IR drop. Nevertheless, a reliable capacitive readout presents certain challenges, particularly in regard to device variability and the trade-off between read yield and read disturbances, which can ultimately result in bit-flips. This paper presents a digital read macro for HfO2 FeCaps and provides reliability analysis for the capacitive readout of HfO2 FeCaps, taking device variability and yield challenges into account. An experimentally calibrated physics-based compact model of HfO2 FeCaps is employed to investigate the reliability of the read-out operation of the FeCap macro through Monte Carlo simulations. Based on this analysis, we identify limitations posed by the device variability and propose potential mitigation strategies through design-technology co-optimization (DTCO) of the FeCap device characteristics and the CMOS circuit design. Finally, we examine the potential applications of the FeCap macro in the context of secure hardware. We identify potential security threats and propose strategies to enhance the robustness of the system.